• 獲得TIEEE 2019年最佳博士論文獎
• 獲得2017旺宏金矽獎優勝獎
• 獲得2015旺宏金矽獎優勝獎
• 獲得2015國家晶片系統設計中心優良晶片優設計奬

2015

• [J01]. Wei-Cheng Sun, Wei-Hsuan Wu, Chia-Hsiang Yang, and Yeong-Luh Ueng, “An Iterative Detection and Decoding Receiver for LDPC-Coded MIMO Systems,” IEEE Trans. Circuits & Systems I (TCAS-I), vol. 62, no. 10, pp. 2512-2522, Oct. 2015.

2019

• [J02]. Yan-Tong Chen, Wei-Cheng Sun, Chung-Chao Cheng, Tsung-Lin Tsai, Yeong-Luh Ueng, and Chia-Hsiang Yang, “An Integrated Message-Passing Detector and Decoder for Polar-Coded Massive MU-MIMO Systems,” IEEE Trans. Circuits & Systems I (TCAS-I), vol. 66, no. 3, pp. 1205-1218, March 2019.
• [J03]. Wei-Cheng Sun, Yan-Tong Chen, Chia-Hsiang Yang, and Yeong-Luh Ueng, “An Iterative Detection and Decoding Receiver for LDPC-Coded MIMO Systems,” IEEE Trans. Signal Processing, vol. 67, no. 6, pp. 1636-1647, March, 2019.
• [J04]. Wei-Cheng Sun, Yu-Chieh Su, Yeong-Luh Ueng, and Chia-Hsiang Yang, “An LDPC-Coded SCMA Receiver With Multi-User Iterative Detection and Decoding,” IEEE Trans. Circuits & Systems I (TCAS-I), vol. 66, no. 9, pp. 3571-3584, Sept. 2019,

2013

• [C01]. Wei-Cheng Sun, Yen-Ming Chen, Chen-Yu Weng, Yeong-Luh Ueng, Jen-Yuan Hsu, and Pangan Ting, “An efficient implementation of the distance-based decoding for block turbo codes,” 2013 8^th International Conference on Communications and Networking in China (CHINACOM), Guilin, 2013, pp. 675-679.

2015

• [C02]. Wei-Hsuan Wu, Wei-Cheng Sun, Chia-Hsiang Yang, and Yeong-Luh Ueng, “A 794Mbps 135mW Iterative Detection and Decoding Receiver for LDPC-Coded MIMO Systems,” Proc. Int. Symposium on VLSI Circuits (VLSI), pp. 102-103, Jun. 2015.

2017

• [C03]. Wei-Cheng Sun, Chia-Hsiang Yang, Yen-Ming Chen, and Yeong-Luh Ueng, “An Area-efficient Multi-Mode LLR Computing Engine for MMSE-based MIMO Detectors,” in Proc. Vehicular Technology Conf. (VTC-Spring), Sydney, Australia, 4-7 June 2017.
• [C04]. Yan-Tong Chen, Chung-Chao Cheng, Tsung-Lin Tsai, Wei-Cheng Sun, Yeong-Luh Ueng, and Chia-Hsiang Yang, “A 501mW 7.61Gb/s Integrated Message-Passing Detector and Decoder for Polar-Coded Massive MIMO Systems”, Proc. Int. Symposium on VLSI Circuits (VLSI), C26-1, Jun. 2017.

2016

• [TP01]. 翁詠祿、孫唯晟、吳維軒、楊家驤, “疊代式解碼裝置、疊代式訊號檢驗裝置與資訊更新方法” (發明第I555339號, 2016/10/21~2035/04/20)